1. Field of the Invention
Embodiments of the invention relate to a semiconductor memory device, a memory cell of a semiconductor memory device, and a method for controlling the device. In particular, embodiments of the invention relate to a resistive semiconductor memory device having a three-dimensional stack structure, a memory cell of the resistive semiconductor memory device, and a method for controlling the device.
2. Description of Related Art
Because of the need for memory devices having relatively high storage capacity and relatively low power consumption, memory devices that are non-volatile and do not require refreshing are being studied. These memory devices, which are presently considered to be “next-generation” semiconductor devices, include phase change random access memory (PRAM) devices that each utilize a phase change material, resistive random access memory (RRAM) devices that each utilize a material having variable resistance characteristics (such as a transition metal oxide), magnetic random access memory (MRAM) devices that each utilize a ferromagnetic material, and ferroelectric random access memory (FRAM) devices that each utilize a ferroelectric material.
An MRAM device is a memory device in which data may be stored using the magnetization direction in tunnel junctions. In an MRAM device, the magnetization direction in a tunnel junction may be changed. An FRAM device is a memory device that stores data by exploiting the polarization characteristics of the ferroelectric material. Both of those types of devices have advantages and disadvantages, but both are being studied in the pursuit of memory devices having relatively high integration densities, relatively fast operation characteristics, relatively low power consumption, and improved data retention characteristics.
A PRAM device is a memory device that stores data by selectively changing a resistance value by selectively changing the phase of a phase change material. As used herein, the term “phase change material” refers to a material, such as chalcogenide, wherein the resistance of the material varies as its phase changes according to a change in temperature. Generally, GexSbyTez which is an alloy of germanium (Ge), antimony (Sb), and tellurium (Te) is used as the phase change material.
The phase change material is well-adapted for use in a semiconductor memory device because the phase of the phase change material can be rapidly changed between two states (an amorphous state and a crystalline state) according to the temperature of the phase change material.
An RRAM device mainly stores data using the resistance conversion characteristic of a transition metal oxide. That is, the resistance value of a transition metal oxide can be changed according to a voltage applied to the transition metal oxide.
A memory cell structure of a resistive semiconductor memory device using a resistance conversion material may be a transistor structure or a diode structure. A transistor structure is a structure in which a transistor is employed as a switching element, and a diode structure is a structure in which a diode is employed as a switching element.
Compared to a semiconductor memory device using the transistor structure, a relatively high write current increasing exponentially according to an applied voltage can be applied in a semiconductor memory device using the diode structure for memory cells. Thus, a semiconductor memory device using the diode structure can avoid a limit on the size of a transistor, so the sizes of memory cells and even the size of an entire chip can be reduced more than in a semiconductor memory device using a transistor structure. Therefore, it is expected that demand for semiconductor memory devices using diode structures as memory cells and having relatively high integration densities, relatively high operation speeds, relatively low power consumption will increase.
FIG. 1 shows the memory cell structure of a conventional resistive semiconductor memory device.
As shown in FIG. 1, a memory cell M of the conventional resistive semiconductor memory device includes one diode D and one variable resistor R. Variable resistor R is formed from a transition metal oxide.
Diode D of memory cell M is connected between a word line WL and variable resistor R. For example, the cathode terminal of diode D is connected to word line WL and the anode terminal of diode D is connected to one end of variable resistor R. In addition, variable resistor R is connected between diode D and a bit line BL.
In a resistive semiconductor memory device having a memory cell M having the diode structure described above, variable resistor R functions as a data storage element, and a write operation is performed by exploiting the resistance characteristics of variable resistor R. In particular, a write operation is performed by exploiting the fact that the resistance of variable resistor R may change in accordance with the magnitude of a voltage applied to memory cell M through bit line BL. That is, when a write operation is performed on memory cell M, a voltage is supplied to memory cell M through bit line BL. In addition, if word line WL transitions to a low level or a ground level, a forward bias is applied to diode D to form a current path from bit line BL to word line WL.
The logic state stored in memory cell M after a write operation has been performed depends upon the level of the voltage applied to bit line BL during the write operation. For example, if a write voltage having a voltage level corresponding to a data value “0” is applied to memory cell M, then the data value “0” is written to memory cell M. Alternatively, if a write voltage having a voltage level corresponding to a data value “1” is applied to memory cell M, then the data value “1” is written to memory cell M.
In addition, in a read operation, the logic state of a data value stored in memory cell M may be determined by evaluating the amount of current flowing through memory cell M. That is, the logic state of the data value stored in memory cell M is determined by applying a read voltage having a predetermined voltage level to memory cell M and measuring the variation in the level of the current flowing from bit line BL to word line WL.
As the degree of integration of semiconductor memory devices gradually increases, the degree of integration of resistive semiconductor memory devices having memory cells having the diode structure also increases. However, the degree of integration of a semiconductor memory device having a two-dimensional structure is approaching an upper limit.
Further, since memory cells of the resistive memory device described above have various resistance distributions, a sensing margin for accurately sensing the data value “0” and the data value “1” cannot be sufficiently guaranteed.